The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2005

Filed:

Sep. 23, 2003
Applicants:

Ryotaro Sakurai, Hachioji, JP;

Hitoshi Tanaka, Ome, JP;

Satoshi Noda, Ome, JP;

Koji Shigematsu, Fussa, JP;

Inventors:

Ryotaro Sakurai, Hachioji, JP;

Hitoshi Tanaka, Ome, JP;

Satoshi Noda, Ome, JP;

Koji Shigematsu, Fussa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C016/00 ;
U.S. Cl.
CPC ...
Abstract

An electrically programmable and erasable nonvolatile semiconductor memory such as a flash memory is designed into a configuration in which, when a cutoff of the power supply occurs in the course of a write or erase operation carried out on a memory cell employed in the non-volatile semiconductor memory, the operation currently being executed is discontinued and a write-back operation is carried out to change a threshold voltage of the memory cell in the reversed direction. In addition, the configuration also allows the number of charge-pump stages in an internal power-supply configuration to be changed in accordance with the level of a power-supply voltage so as to make the write-back operation correctly executable. As a result, no memory cells are put in deplete state even in the event of a power-supply cutoff in the course of a write or erase operation.


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