The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 28, 2005

Filed:

Jan. 13, 2003
Applicants:

Qing-tang Jiang, Austin, TX (US);

Changming Jin, Plano, TX (US);

Joseph D. Luttmer, Richardson, TX (US);

Inventors:

Qing-Tang Jiang, Austin, TX (US);

Changming Jin, Plano, TX (US);

Joseph D. Luttmer, Richardson, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L021/44 ;
U.S. Cl.
CPC ...
Abstract

A method of manufacturing a semiconductor device includes the steps of providing a semiconductor substrate (), forming a dielectric layer () over the semiconductor substrate (), and etching a trench or a via () in the dielectric layer () to expose a portion of the surface of the semiconductor substrate (). The method also includes the step of forming a conductive layer () within in the trench or the via (). The method further includes the steps of polishing a portion of the conductive layer () and annealing the conductive layer () at a predetermined temperature. Moreover, the conductive layer () also includes a dopant, and the dopant diffuses substantially to the surface of the top side of the conductive layer () to form a dopant oxide layer () when the conductive layer () is annealed at the predetermined temperature and the dopant is exposed to oxygen.


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