The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 17, 2005
Filed:
Oct. 31, 2001
Takashi Kobayashi, Nagano, JP;
Tatsuhiko Fujihira, Nagano, JP;
Hitoshi Abe, Nagano, JP;
Yasushi Niimura, Nagano, JP;
Masanori Inoue, Nagano, JP;
Takashi Kobayashi, Nagano, JP;
Tatsuhiko Fujihira, Nagano, JP;
Hitoshi Abe, Nagano, JP;
Yasushi Niimura, Nagano, JP;
Masanori Inoue, Nagano, JP;
Fuji Electric Co., Ltd., , JP;
Abstract
A MOS semiconductor device includes n-type surface regions, which are extended portions of an n-type drift layerextended to the surface of the semiconductor chip. Each n-type surface regionis shaped with a stripe surrounded by a p-type well region. The surface area ratio between n-type surface regionsand p-type well regionincluding an n-type regionis from 0.01 to 0.2. The MOS semiconductor device further includes, in the breakdown withstanding region thereof, a plurality of guard rings, the number of which is equal to or more than the number n calculated from the following equation n=(Breakdown voltage Vbr (V))/100, and the spacing between the adjacent guard rings is set at 1 μm or less.