The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2005

Filed:

Jun. 28, 2002
Applicants:

Michal Palusinski, Cupertino, CA (US);

Mariusz Niewczas, Cupertino, CA (US);

Wojciech Maly, Pittsburgh, PA (US);

Andrezej Strojwas, Pittsburgh, PA (US);

Thomas Waas, Munich, DE;

Hans Eisenmann, Munich, DE;

Inventors:

Michal Palusinski, Cupertino, CA (US);

Mariusz Niewczas, Cupertino, CA (US);

Wojciech Maly, Pittsburgh, PA (US);

Andrezej Strojwas, Pittsburgh, PA (US);

Thomas Waas, Munich, DE;

Hans Eisenmann, Munich, DE;

Assignee:

PDF Solutions, Inc., San Jose, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F017/50 ; G06F009/45 ;
U.S. Cl.
CPC ...
Abstract

A method to describe a circuit pattern comprises identifying vertices and those edges of the circuit pattern that are not incident with any vertex contained within a region of interest within the circuit pattern. The region of interest includes a portion of a polygon that is less than the entire polygon. The vertices and edges of the circuit pattern are compared to a predetermined set of known vertices and edges. A match may be used to identify an acceptable circuit or a defective circuit.


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