The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 10, 2005

Filed:

Apr. 30, 2003
Applicants:

Andrea Franke, Austin, TX (US);

Jonathan Cobb, Austin, TX (US);

John M. Grant, Austin, TX (US);

AL T. Koh, Austin, TX (US);

Yeong-jyh T. Lii, Austin, TX (US);

Bich-yen Nguyen, Austin, TX (US);

Anna M. Phillips, Manchaca, TX (US);

Inventors:

Andrea Franke, Austin, TX (US);

Jonathan Cobb, Austin, TX (US);

John M. Grant, Austin, TX (US);

Al T. Koh, Austin, TX (US);

Yeong-Jyh T. Lii, Austin, TX (US);

Bich-Yen Nguyen, Austin, TX (US);

Anna M. Phillips, Manchaca, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L027/01 ; H01L029/00 ;
U.S. Cl.
CPC ...
Abstract

A method of forming a semiconductor device so as to provide the device inverted isolation trenches with convex sidewalls. Initially, a plurality of composite isolation posts () are formed on a substrate () through successive deposition, lithography, and etching steps. The posts comprise a bottom layer () of silicon dioxide and an overlying etch-stop layer of silicon nitride (). An insulating material () is then deposited over the isolation posts and areas of the substrate. Isolation structures () are established by etching the insulating material to form convex sidewall spacers () at the vertical walls of the isolation posts. Active areas () between spacers are filled with semiconductor material. In an embodiment, a strained cap layer () may be imposed on the active areas. The strained cap layer has a lattice constant that is different from the lattice constant of the semiconductor material.


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