The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2005
Filed:
Jun. 30, 1999
Tinghao F. Wang, Fremont, CA (US);
Usha Raghuram, San Jose, CA (US);
James E. Nulty, San Jose, CA (US);
Tinghao F. Wang, Fremont, CA (US);
Usha Raghuram, San Jose, CA (US);
James E. Nulty, San Jose, CA (US);
Cypress Semiconductor Corporation, San Jose, CA (US);
Abstract
Prior to etching a poly-II layer during fabrication of an integrated circuit, a hydrofluoric acid (HF) dip is used to remove surface oxides from the poly-silicon layer and an anisotropic descumming operation is used to remove any resist material left over from a patterning operation. Following patterning, a long breakthrough etch (e.g., sufficient to remove 300-1500 Å of oxide) using an anisotropic breakthrough etchant (e.g., a fluorocarbon-based etchant) is performed before the poly-silicon layer is etched. The HF dip may be repeated if a predetermined time between the first dip and the etch is exceeded. The anisotropic descumming operation may be performed using an anisotropic anti-reflective coating (ARC) etch, e.g., a Cl/O, HBr/O, CF/Oor another etch having an etch rate of approximately 3000 Å/min for approximately 10-20 seconds. The poly-silicon layer may be annealed following (but not prior to) the etch thereof.