The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 10, 2005
Filed:
Jan. 07, 2003
Takahiro Daikoku, Ushiku, JP;
Kenichi Kasai, Ushiku, JP;
Toshitada Netsu, Hadano, JP;
Koichi Koyano, Hadano, JP;
Takayuki Uda, Hadano, JP;
Takahiro Daikoku, Ushiku, JP;
Kenichi Kasai, Ushiku, JP;
Toshitada Netsu, Hadano, JP;
Koichi Koyano, Hadano, JP;
Takayuki Uda, Hadano, JP;
Hitachi, Ltd., Tokyo, JP;
Abstract
According to the invention, a sealing top plate in a multi-chip module is formed from a ceramic with high thermal conductivity having a thermal expansion coefficient consistent with that of a multi-layer circuit substrate. A cooling flow path cover covering the entirety of cooling flow path grooves is formed as a separate metallic member. The back surface of the sealing top plate, on which are formed the cooling flow path grooves, is bonded directly to the back surface of a semiconductor device using solder. A thermal-conductive jacket with low thermal resistance is provided. A multi-chip module sealing frame is soldered to the edge of the sealing top plate. Furthermore, a sealing material such as an O-ring is simply interposed between the edge of the sealing top plate and the cooling water path cover, and tightening means is used to tighten the metallic cooling flow path cover and the multi-chip module sealing frame to each other.