The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 03, 2005

Filed:

Mar. 13, 2003
Applicants:

Wilfried Von Ammon, Hochburg/Ach, AT;

Ruediger Schmolke, Burghausen, DE;

Peter Storck, Mehring, DE;

Wolfgang Siebert, Mehring, DE;

Inventors:

Wilfried Von Ammon, Hochburg/Ach, AT;

Ruediger Schmolke, Burghausen, DE;

Peter Storck, Mehring, DE;

Wolfgang Siebert, Mehring, DE;

Assignee:

Siltronic AG, Munich, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L021/205 ;
U.S. Cl.
CPC ...
Abstract

A process for epitaxially coating the front surface of a semiconductor wafer in a CVD reactor, the front surface of the semiconductor wafer being exposed to a process gas which contains a source gas and a carrier gas, and the back surface of the semiconductor wafer being exposed to a displacement gas, wherein the displacement gas contains no more than 5% by volume of hydrogen, with the result that diffusion of dopants out of the back surface of the semiconductor wafer, which is intensified by hydrogen, is substantially avoided. With this process, it is possible to produce a semiconductor wafer with a substrate resistivity of ≦100 mΩcm and a resistivity of the epitaxial layer of >1 Ωcm without back-surface coating, the epitaxial layer of which semiconductor wafer has a resistance inhomogeneity of <10%.


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