The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6880136 B1

PDF
Full Text
Expired
Date of Patent:
Apr. 12, 2005

Filed:

Jul. 09, 2002
Applicants:

Leendert M. Huisman, South Burlington, VT (US);

Maroun Kassab, St-Eustache, CA;

Leah M. P. Pastel, Essex, VT (US);

Inventors:

Leendert M. Huisman, South Burlington, VT (US);

Maroun Kassab, St-Eustache, CA;

Leah M. P. Pastel, Essex, VT (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F017/50 ; G01R031/26 ; H01L021/00 ;
U.S. Cl.
CPC ...
Abstract

Defects in manufacturing of IC devices are analyzed by testing the devices for defects using results of LSSD technology to find at least one failing pattern that contains incorrect values. The failing latches are used as a starting point to trace back through combinational logic feeding the failing latches, until controllable latches are encountered. A decision is then made to continue the back tracing or not depending on whether the latter latches were clocked during the application of one of the failing patterns or not.


Find Patent Forward Citations

Huisman, Leendert. (2005). Method to detect systematic defects in vlsi manufacturing (U.S. Patent No. 6880136). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6880136

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