The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6873559 B1

PDF
Full Text
Expired
Date of Patent:
Mar. 29, 2005

Filed:

Jan. 13, 2003
Applicant:

Hirokazu Ueda, Nishiwaki, JP;

Inventor:

Hirokazu Ueda, Nishiwaki, JP;

Assignee:

Micron Technology, Inc., Boise, ID (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C007/00 ;
U.S. Cl.
CPC ...
Abstract

A differential sensing circuit and sensing method for use in a low voltage memory device. The sensing circuit includes a cross-coupled sensing circuit for coupling with a memory element, a pull-up circuit and a multistage pull-down circuit. The multistage pull-down circuit accelerates the latching process of the cross-coupled sensing circuit by briefly pulling the cross-coupled sensing circuit to a potential below ground in order to increase the gate potential differential on at least a portion of the transistors within the cross-coupled sensing circuit. Once the latching transitions have commenced at an acceptable rate, the below-ground potential is removed and the traditional logic level pull-up and ground-potential pull-down circuits are activated.


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Ueda, Hirokazu. (2005). Method and apparatus for enhanced sensing of low voltage memory (U.S. Patent No. 6873559). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6873559

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