The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 29, 2005
Filed:
Jun. 22, 2000
Francis G. Celii, Dallas, TX (US);
Guoqiang Xing, Plano, TX (US);
Andrew Mckerrow, Dallas, TX (US);
Andrew Ralston, Richardson, TX (US);
Zhicheng Tang, Plano, TX (US);
Kenneth J. Newton, McKinney, TX (US);
Robert Kraft, Plano, TX (US);
Jeff West, San Antonio, TX (US);
Francis G. Celii, Dallas, TX (US);
Guoqiang Xing, Plano, TX (US);
Andrew McKerrow, Dallas, TX (US);
Andrew Ralston, Richardson, TX (US);
Zhicheng Tang, Plano, TX (US);
Kenneth J. Newton, McKinney, TX (US);
Robert Kraft, Plano, TX (US);
Jeff West, San Antonio, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A dual damascene process flow for forming interconnect lines and vias in which at least part of the via () is etched prior to the trench etch. A low-k material such as a thermoset organic polymer is used for the ILD () and IMD (). After the at least partial via etch, a BARC () is deposited over the structure including in the via (). Then, the trench () is patterned and etched. Although at least some of the BARC () material is removed during the trench etch, the bottom of the via () is protected.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile