The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 29, 2005

Filed:

Sep. 18, 2002
Applicants:

Masayoshi Shirahata, Tokyo, JP;

Yukio Nishida, Tokyo, JP;

Inventors:

Masayoshi Shirahata, Tokyo, JP;

Yukio Nishida, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L021/336 ;
U.S. Cl.
CPC ...
Abstract

A gate structure (), an LDD region () and a sidewall () are provided in this order. Arsenic ions () are thereafter implanted into the upper surface of a silicon substrate () by tilted implantation. The next step is annealing for forming an MDD region () in the upper surface of the silicon substrate (). The MDD region () and the gate structure () do not overlap one another in plan view. Further, the MDD region () formed into a depth shallower than that of the LDD region () is higher in concentration than the LDD region (). Thereafter a source/drain region () higher in concentration than the MDD region () is provided by vertical implantation into a depth greater than that of the LDD region ().


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