The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6849885 B1

PDF
Full Text
Expired
Date of Patent:
Feb. 01, 2005

Filed:

Jul. 25, 2003
Applicants:

Hiroyuki Enomoto, Mitaka, JP;

Hiroyuki Maruyama, Ome, JP;

Makoto Yoshida, Suwon-Si, KR;

Inventors:

Hiroyuki Enomoto, Mitaka, JP;

Hiroyuki Maruyama, Ome, JP;

Makoto Yoshida, Suwon-Si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2976 ;
U.S. Cl.
CPC ...
Abstract

An amount of a semiconductor substrate cut due to etching in the bottom of a contact hole formed by the SAC technique is reduced. Silicon oxide films are dry etched under the conditions of increasing the etching selective ratio of the silicon oxide films to an insulating film. Then, the conditions are changed to those increasing the etching selective ratio of the insulating film to the silicon oxide films and the insulating film is etched by a predetermined amount.


Find Patent Forward Citations

Enomoto, Hiroyuki. (2005). Method of producing a semiconductor integrated circuit device and the semiconductor integrated circuit device (U.S. Patent No. 6849885). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6849885

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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