The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 01, 2005
Filed:
Dec. 30, 2002
Douglas J. Bonser, Austin, TX (US);
Marina V. Plat, San Jose, CA (US);
Chih Yuh Yang, San Jose, CA (US);
Scott A. Bell, San Jose, CA (US);
Srikanteswara Dakshina-murthy, Austin, TX (US);
Philip A. Fisher, Foster City, CA (US);
Christopher F. Lyons, Fremont, CA (US);
Douglas J. Bonser, Austin, TX (US);
Marina V. Plat, San Jose, CA (US);
Chih Yuh Yang, San Jose, CA (US);
Scott A. Bell, San Jose, CA (US);
Srikanteswara Dakshina-Murthy, Austin, TX (US);
Philip A. Fisher, Foster City, CA (US);
Christopher F. Lyons, Fremont, CA (US);
Advanced Micro Devices, Sunnyvale, CA (US);
Abstract
To reduce the width of a MOSFET gate, the gate is formed with a hardmask formed thereupon. An isotropic etch is then performed to trim the gate in order to reduce the width of the gate. The resulting gate may be formed with a width that is narrower than a minimum width achievable solely through conventional projection lithography techniques.