The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 25, 2005
Filed:
Aug. 15, 2000
Steven Towle, Sunnyvale, CA (US);
Ebrahim Andideh, Portland, OR (US);
Lawrence D. Wong, Beaverton, OR (US);
Steven Towle, Sunnyvale, CA (US);
Ebrahim Andideh, Portland, OR (US);
Lawrence D. Wong, Beaverton, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
A low dielectric constant material having a first fluorine concentration in a near-surface portion and a second fluorine concentration in an interior portion provides an insulator suitable for use in integrated circuits. In a further aspect of the present invention, fluorine is depleted from a near-surface portion of a fluorine containing dielectric material by a reducing plasma. Fluorine in fluorinated low-k dielectric materials, such as SiOF, amorphous fluorinated carbon (a-F:C) and parylene-AF4, can react with surrounding materials such as metals and SiN, causing blisters and delamination. Treatment of these fluorinated low-k dielectric materials in a reducing plasma, which may be produced from precursor gases such as Hor NH, depletes the surface region of fluorine and hence reduces reaction with surrounding materials and F outgassing. By selecting an appropriate point in the integration flow, specific interfaces which are most susceptible to F-attack can be targeted for depletion.