The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 14, 2004

Filed:

Oct. 24, 2002
Applicant:
Inventors:

Hiroyuki Oi, Tokyo, JP;

Hitoshi Okuda, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/176 ;
U.S. Cl.
CPC ...
H01L 2/176 ;
Abstract

The present invention provides a method for producing a bonded dielectric separation wafer in which an auto-alignment can be carried out with reference to the orientation flat of a supporting substrate wafer after the wafer bonding step, and also an apparatus to be used for bonding wafers. When wafers are placed one upon another, the silicon wafers are irradiated with transmission light in order to capture the transmission images thereof. The positions of the pattern of dielectric isolation grooves in the silicon wafer and the orientation flat of the silicon wafer are determined from the images and the bonding position of the wafers is determined based on the determined positions. Auto-alignment of the bonded dielectric separation wafer can thereby be carried out with reference to the orientation flat of the silicon wafer after the wafer bonding step.


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