The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 30, 2004

Filed:

Jan. 27, 2003
Applicant:
Inventors:

Jörg Horzel, Leuven, BE;

Jozef Szlufcik, Kessel-lo, BE;

Mia Honoré, Kortenberg, BE;

Johan Nijs, Linden-Lubbeek, BE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/122 ;
U.S. Cl.
CPC ...
H01L 2/122 ;
Abstract

The present invention describes a method of manufacturing a semiconductor device, comprising a semiconductor substrate in the shape of a slice, the method comprising the steps of: step 1) selectively applying a pattern of a solids-based dopant source to a first major surface of said semiconducting substrate; step 2) diffusing the dopant atoms from said solids-based dopant source into said substrate by a controlled heat treatment step in a gaseous environment surrounding said semi-conducting substrate, the dopant from said solids-based dopant source diffusing directly into said substrate to form a first diffusion region and, at the same time, diffusing said dopant from said solids-based dopant source indirectly via said gaseous environment into said substrate to form a second diffusion region in at least some areas of said substrate to form a second diffusion region in at least some areas of said substrate not covered by said pattern; and step 3) forming a metal contact pattern substantially in alignment with said first diffusion region without having etched said second diffusion region substantially.


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