The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6822334 B1

PDF
Full Text
Expired
Date of Patent:
Nov. 23, 2004

Filed:

Jan. 10, 2001
Applicant:
Inventors:

Katsunobu Hori, Tokyo, JP;

Nobuo Fujiwara, Tokyo, JP;

Takashi Watadani, Tokyo, JP;

Makoto Nagano, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/348 ; H01L 2/352 ;
U.S. Cl.
CPC ...
H01L 2/348 ; H01L 2/352 ;
Abstract

A hard mask material such as a silicon oxide film is formed on an aluminum alloy film . The hard mask material is patterned in the form of a thick film wiring , followed by etching the aluminum alloy film to a given depth through the mask. A resist applied to the thin film portion of the aluminum alloy film is patterned in the form of a thin film wiring . Etching through the resist and the hard mask material as a mask is effected to form the thick film wiring and the thin film wiring in the same layer.


Find Patent Forward Citations

Hori, Katsunobu. (2004). Semiconductor device having a layered wiring structure with hard mask covering (U.S. Patent No. 6822334). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6822334

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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