The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 23, 2004
Filed:
Oct. 30, 2002
Dennis Lazaroff, Corvallis, OR (US);
Kenneth M. Kramer, Corvallis, OR (US);
James E. Ellenson, Corvallis, OR (US);
Neal W. Meyer, Corvallis, OR (US);
David Punsalan, Eugene, OR (US);
Kurt Ulmer, Corvallis, OR (US);
Peter Fricke, Corvallis, OR (US);
Andrew Koll, Albany, OR (US);
Andrew L. Van Brocklin, Corvallis, OR (US);
Hewlett-Packard Development Company, L.P., Houston, TX (US);
Abstract
Tunnel-junction structures are fabricated by any of a set of related methods that form two or more tunnel junctions simultaneously. The fabrication methods disclosed are compatible with conventional CMOS fabrication practices, including both single damascene and dual damascene processes. The simultaneously formed tunnel junctions may have different areas. In some embodiments, tub-well structures are formed with sloped sidewalls. In some embodiments, an oxide-metal-oxide film stack on the sidewall of a tub-well is etched to form the tunnel junctions. Memory circuits, other integrated circuit structures, substrates carrying microelectronics, and other electronic devices made by the methods are disclosed.