The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 26, 2004
Filed:
Dec. 05, 2002
Applicant:
Inventors:
Assignee:
Taiwan Semiconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/18242 ;
U.S. Cl.
CPC ...
H01L 2/18242 ;
Abstract
A new method and structure is provided for the creation of a 1T-RAM cell. Shallow Trench Isolation (STI) regions are provided over a substrate. A 3D capacitor area is defined over the substrate, a patterned layer of polysilicon or HSG polysilicon is created aligned with the 3D capacitor area, providing the bottom plate of a 3D capacitor. Gate oxide is grown to form a dielectric for CMOS gate electrodes and the 3D capacitor dielectric. A patterned layer of polysilicon is created, defining gate electrodes and 3D capacitor upper plates.
Chen, Chung-Yi. (2004). Method of process simplification and eliminating topography concerns for the creation of advanced 1t-ram devices (U.S. Patent No. 6808980). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6808980
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile