The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 26, 2004
Filed:
Sep. 06, 2001
Fu-Chieh Hsu, Saratoga, CA (US);
Wingyu Leung, Cupertino, CA (US);
Monolithic System Technology, Inc., Sunnyvale, CA (US);
Abstract
A non-volatile memory (NVM) system includes a NVM cell having: a semiconductor region having a first conductivity type; a gate dielectric layer located over the semiconductor region; a gate electrode located over the gate dielectric layer; a source region and a drain region of a second conductivity type, opposite the first conductivity type, located in the semiconductor region and aligned with the gate electrode; a crown electrode having a base that contacts the gate electrode and walls that extend vertically from the base region, away from the gate electrode; a dielectric layer located over the crown electrode, wherein the dielectric layer extends over at least interior surfaces of the walls; and a plate electrode located over the dielectric layer, wherein the plate electrode extends over at least interior surfaces of the walls.