The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 05, 2004
Filed:
Dec. 17, 2003
Ching-Hsiang Hsu, Hsin-Chu, TW;
Chih-Hsun Chu, Hsin-Chu, TW;
Jih-Wen Chou, Hsin-Chu, TW;
Cheng-Tung Huang, Kao-Hsiung, TW;
eMemory Technology Inc., Hsin-Chu City, TW;
Abstract
A method for programming PMOS single transistor flash memory cells through channel hot carrier induced hot electron injection mechanism is disclosed. The PMOS single transistor flash memory cell includes an ONO stack layer situated on an N-well of a semiconductor substrate, a P poly gate formed on the ONO stack layer, a P doped source region disposed in the N-well at one side of the gate, and a P doped drain region disposed in the N-well at the other side of the gate. The method includes the steps of: applying a word line voltage V on the P poly gate, applying a source line voltage V on the source, wherein the source line voltage V is greater than the word line voltage V , thereby providing adequate bias to turn on the P channel thereof. A bit line voltage that is smaller than the source line voltage V is applied on the P doped drain region, thereby driving channel hot holes to flow toward the P doped drain region and then inducing hot electron injection near the drain side. A well voltage V is applied to the N-well, wherein V =V .