The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 31, 2004

Filed:

Nov. 25, 2002
Applicant:
Inventors:

Shuji Eguchi, Tokai-mura, JP;

Akira Nagai, Hitachi, JP;

Haruo Akahoshi, Hitachi, JP;

Takumi Ueno, Mito, JP;

Toshiya Satoh, Kanasagou-machi, JP;

Masahiko Ogino, Hitachi, JP;

Asao Nishimura, Kokubunji, JP;

Ichiro Anjo, Koganei, JP;

Hideki Tanaka, Sagamihara, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/334 ; H01L 2/348 ;
U.S. Cl.
CPC ...
H01L 2/334 ; H01L 2/348 ;
Abstract

In a multi-chip module, a plurality of semiconductor chips are mounted on a single wiring board. Upper surfaces of the chips are covered with a single heat spread plate, and the whole space around the chips sandwiched between the wiring board and the heat spread plate is filled with resin. The semiconductor chips are interconnected through the resin so that any stress exerted on any chips is dispersed. This diminishes the occurrence of cracks caused by stress concentration. Since the chips and the heat spread plate are bonded together with resin, even if there are variations in size of the chips, both can be bonded easily. Further, the bonding of all the chips and the heat spread plate can be done in a single process.


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