The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 24, 2004

Filed:

Dec. 20, 2001
Applicant:
Inventors:

Wen-Jie Qi, Austin, TX (US);

John G. Pellerin, Austin, TX (US);

William G. En, Milpitas, CA (US);

Mark W. Michael, Cedar Park, TX (US);

Darin A. Chan, Campbell, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/1302 ;
U.S. Cl.
CPC ...
H01L 2/1302 ;
Abstract

A method of forming a semiconductor device provides a gate electrode on a substrate and forms a polysilicon reoxidation layer over the substrate and the gate electrode. A nitride layer is deposited over the polysilicon reoxidation layer and anisotropically etched The etching stops on the polysilicon reoxidation layer, with nitride offset spacers being formed on the gate electrode. The use of the polysilicon reoxidation layer as an etch stop layer prevents the gouging of the silicon substrate underneath the nitride layer, while allowing the offset spacers to be formed.


Find Patent Forward Citations

Qi, Wen-Jie. (2004). Nitride offset spacer to minimize silicon recess by using poly reoxidation layer as etch stop layer (U.S. Patent No. 6780776). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6780776

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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