The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 27, 2004

Filed:

Nov. 10, 1999
Applicant:
Inventors:

Masaru Tsuto, Tokyo, JP;

Tatsuya Yamada, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/100 ; G06F 1/328 ;
U.S. Cl.
CPC ...
G06F 1/100 ; G06F 1/328 ;
Abstract

A test pattern generator for generating a test pattern for testing electrical characteristics of an electrical device. The test pattern generator comprises a pattern memory ( ), a pattern cache memory ( and ), a vector memory ( ), a read out controller ( and ), and a transfer controller ( and ). The pattern memory ( ) stores the test pattern. The pattern cache memory ( and ) stores the test pattern read out from the pattern memory ( ). The vector memory ( ) stores a vector instruction indicating an order of the test pattern to be generated. The read out controller ( and ) judges whether an address of the test pattern to be read out from the pattern memory ( ) is to be jumped or not based on the vector instruction read out from the vector memory ( ). The transfer controller ( and ) reads out the test pattern from the jumped address, and for transferring the jumped address to a pattern cache memory ( and ) when the read out controller ( and ) judges the address is to be jumped.


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