The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 22, 2004

Filed:

Dec. 12, 2002
Applicant:
Inventors:

Toru Yamauchi, Fuchu, JP;

Kiminori Okada, Fuchu, JP;

Tadahito Nezu, Fuchu, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/900 ;
U.S. Cl.
CPC ...
G06F 1/900 ;
Abstract

An interlock system can discriminate a controller in which an abnormality occurs in a control system of a semiconductor manufacturing apparatus in which a plurality of controllers are connected through a network. A processing system contains at least one processing chamber which performs a semiconductor manufacturing process. A conveyance system takes an object to be processed in and out of the processing chamber. The control system includes at least one apparatus controller, which controls the processing system and the conveyance system, and an equipment controller, which manages the apparatus controller. The apparatus controller and the equipment controller are communicably connected through a network. The apparatus controller and the equipment controller are also connected via a hard wire so as to transmit a status signal of the apparatus controller and the equipment controller to the control system so that a presence of each apparatus controller and a status of connection between the controllers can be detected without using communication through the network.


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