The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 22, 2004
Filed:
Mar. 06, 2003
Shuji Ikeda, Koganei, JP;
Yasuko Yoshida, Sayama, JP;
Masayuki Kojima, Kokubunji, JP;
Kenji Shiozawa, Hidaka, JP;
Mitsuyuki Kimura, Kokubunji, JP;
Norio Nakagawa, Tokyo, JP;
Koichiro Ishibashi, Warabi, JP;
Yasuhisa Shimazaki, Tachikawa, JP;
Kenichi Osada, Kokubunji, JP;
Kunio Uchiyama, Kodaira, JP;
Renesas Technology Corp., Tokyo, JP;
Abstract
An operational margin of a memory of a semiconductor integrated circuit device including an SRAM is improved. In order to set the Vth of driving MISFETs Qd, transfer MISFETs Qt and MISFETs for load resistance QL forming memory cells of an SRAM, relatively and intentionally higher than the Vth of predetermined MISFETs of SRAM peripheral circuits and logic circuits such as microprocessor, an impurity introduction step is introduced to set the Vth of the driving MISFETs Qd, transfer MISFETs Qt and MISFETs for load resistance, separately from an impurity introduction step for setting the Vth of the predetermined MISFETs.