The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 18, 2004
Filed:
Feb. 22, 2002
Rajendra Pendse, Fremont, CA (US);
Nazir Ahmad, San Jose, CA (US);
Andrea Chen, San Jose, CA (US);
Kyung-Moon Kim, Ichon-si, KR;
Young Do Kweon, Cupertino, CA (US);
Samuel Tam, Daly City, CA (US);
ChipPAC, Inc., Fremont, CA (US);
Abstract
A flip chip package is formed by a solid-state bond technique for connecting the input/output pads on the integrated circuit chip and the package substrate. The solid-state bond technique involves a direct mating of metal surfaces, and does not employ any particulate conductive material nor any melting or flow of any interconnecting material. Accordingly the connections can be formed at very fine geometries. In another aspect, the space between the surface of the integrated circuit chip and the subjacent surface of the package substrate is filled with a patterned adhesive structure, which consists of one or more adhesive materials that are deployed in a specified pattern in relation to the positions of the second level interconnections between the package and the printed circuit board.