The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 23, 2004
Filed:
May. 02, 2002
Akira Nagai, Hitachi, JP;
Takumi Ueno, Mito, JP;
Haruo Akahoshi, Hitachi, JP;
Syuji Eguchi, Tokai-mura, JP;
Masahiko Ogino, Hitachi, JP;
Toshiya Satoh, Kanasagou-machi, JP;
Asao Nishimura, Kokubunji, JP;
Ichiro Anjoh, Koganei, JP;
Renesas Technology Corporation, Tokyo, JP;
Abstract
A semiconductor device and a manufacturing method thereof, which device includes a semiconductor element arranged to form integrated circuitry, a plurality of electrode pads formed on the side of the integrated circuitry formation surface of the semiconductor element, bump electrodes for electrically connecting to the electrode pads through a conductive layer, and a stress relaxation layer formed between the integrated circuitry formation surface and electrode pads on one hand and the bump electrodes and conductive layer on the other hand, the stress relaxation layer being adhered thereto, wherein more than one third of the stress relaxation layer from a surface thereof is cut away for removal and wherein the stress relaxation layer is subdivided into a plurality of regions. Accordingly, it is possible to provide a semiconductor device capable of offering high density mounting schemes with increased reliability while reducing production costs.