The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 02, 2004

Filed:

Dec. 29, 1999
Applicant:
Inventors:

George F. Raiser, Chandler, AZ (US);

Bob Sundahl, Chandler, AZ (US);

Ravi Mahajan, Tempe, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/329 ; H01L 2/328 ; H01L 2/348 ; H01L 2/352 ;
U.S. Cl.
CPC ...
H01L 2/329 ; H01L 2/328 ; H01L 2/348 ; H01L 2/352 ;
Abstract

An integrated circuit package that contains an underfill material between an integrated circuit and a substrate. The integrated circuit may be mounted to the substrate with solder bumps in a C4 process. The underfill material may extend from an edge of the integrated circuit a length that is no less than approximately 25% of the length between the integrated circuit edge and the integrated circuit center. It has been discovered that a length greater than approximately 25% does not provide a significant reduction in the strain of the solder bumps.


Find Patent Forward Citations

Raiser, George. (2004). Partial underfill for flip-chip electronic packages (U.S. Patent No. 6700209). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6700209

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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