The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 03, 2004

Filed:

Mar. 31, 2003
Applicant:
Inventors:

Cindy Simpson, Austin, TX (US);

Hsing H. Tseng, Austin, TX (US);

Olubunmi O. Adetutu, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/144 ; H01L 2/348 ;
U.S. Cl.
CPC ...
H01L 2/144 ; H01L 2/348 ;
Abstract

Using plating, metal gates for N channel and P channel transistors are formed of different materials to achieve the appropriate work function for these N and P channel transistors. The plating is achieved with a seed layer consistent with the growth of the desired layer. The preferred materials are selected from the platinum metals, which comprise ruthenium, ruthenium oxide, iridium, palladium, platinum, nickel, osmium, and cobalt. These are attractive metals because they are relatively high conductivity, can be plated, and provide a good choice of work functions for forming P and N channel transistors.


Find Patent Forward Citations

Simpson, Cindy. (2004). Plated metal transistor gate and method of formation (U.S. Patent No. 6686282). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6686282

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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