The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 6674171 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 06, 2004

Filed:

Aug. 01, 2002
Applicant:
Inventor:

Sumio Yamaguchi, Hyogo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/348 ; H01L 2/352 ;
U.S. Cl.
CPC ...
H01L 2/348 ; H01L 2/352 ;
Abstract

An impurity region is formed on the surface of a semiconductor substrate. An insulating layer is provided on the semiconductor substrate to cover the impurity region. A trench for defining a wiring layer is provided on the surface of the insulating layer. A connection hole is provided in the insulating layer for connecting the trench and the impurity region with each other. A conductive layer made of a high melting point metal or a compound thereof is embedded in the connection hole. A copper wire is formed in the trench to be connected to the conductive layer. According to the present invention, a semiconductor device improved to be capable of implementing an excellent wiring circuit and providing a highly integrated semiconductor circuit is obtained.


Find Patent Forward Citations

Yamaguchi, Sumio. (2004). Semiconductor device with a low resistance wiring (U.S. Patent No. 6674171). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6674171

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…