The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 23, 2003
Filed:
Mar. 01, 2001
Heng-Ming Hsu, Ta-Lie, TW;
Jau-Yuann Chung, Richardson, TX (US);
Yen-Shih Ho, Ta-Hu, TW;
Chun-Hon Chen, Hsin-Chu, TW;
Kuo-Reay Peng, Funsung, TW;
Ta-Hsun Yeh, Hsin-Chu, TW;
Kong-Beng Thei, Hsin-Chu, TW;
Ssu-Pin Ma, Taipei, TW;
Taiwan Semiconductor Manufacturing Company, Hsin-Chu, TW;
Abstract
A process for integrating the fabrication of a thick, copper inductor structure, with the fabrication of narrow channel length CMOS devices, has been developed. The integrated process features the use of only one additional photolithographic masking step, used to form the opening in an IMD layer, that will accommodate the subsequent inductor structure. After forming damascene type openings in the same IMD layer, in the CMOS region, copper is deposited and then defined, to result in a thick, copper inductor structure, in the opening in the IMD layer, in a first region of a semiconductor substrate, as well as to result in copper interconnect structures, in the damascene type openings located in a second region of the semiconductor structure, used for the narrow channel length CMOS devices. The use of a thick, copper inductor structure, equal to the thickness of the IMD layer, results in increased inductance, or an increased quality factor, when compared to counterparts formed with thinner metal inductors.