The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 09, 2003
Filed:
Sep. 10, 2001
Wiring editing method, for semiconductor package, capable of easily editing offset of wiring pattern
Tamotsu Kitamura, Nagano, JP;
Takahide Ichimura, Nagano, JP;
Hiroyuki Sakai, Nagano, JP;
Takayuki Nagasaki, Nagano, JP;
Shinko Electric Industries Co., Ltd., Nagano, JP;
Abstract
A wiring editing method for a semiconductor package of this invention includes the steps of assuming virtual circular arcs R to R in consideration of a clearance around a predetermined via in a designated area on a virtual plane, drawing a regular polygon circumscribing each of the virtual circular arcs R to R drawing a tangent from a via crossed by one of the virtual circular arcs R to R to the crossing virtual circular arc and connecting to the regular polygon circumscribing the crossing virtual circular arc to thereby form a wiring pattern and moving or omitting redundant line segments forming the regular polygon in the wiring pattern to change a wiring route when an offset occurs in the wiring pattern passing between the vias inside the designated area.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile