The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 02, 2003

Filed:

Nov. 02, 1999
Applicant:
Inventors:

Nozomu Matsuzaki, Kokubunji, JP;

Takashi Kobayashi, Tokorozawa, JP;

Hitoshi Kume, Musashino, JP;

Toshiyuki Mine, Fusa, JP;

Kikuo Kusukawa, Yoshikawa, JP;

Norio Suzuki, Mito, JP;

Kenji Takahashi, Tokyo, JP;

Toshiaki Nishimoto, Higashimurayama, JP;

Masataka Kato, Koganei, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/7108 ; H01L 2/976 ; H01L 2/994 ; H01L 3/1119 ; H01L 2/900 ;
U.S. Cl.
CPC ...
H01L 2/7108 ; H01L 2/976 ; H01L 2/994 ; H01L 3/1119 ; H01L 2/900 ;
Abstract

There was a problem that sharpening of a substrate and localized increase in the thickness of a gate oxide film become more remarkable as the thickness of the gate oxide film is increased to degrade the gate withstand voltage at the surface edge of shallow groove isolation structure. In the present invention, a bird's beak is disposed at the surface edge of a shallow isolation structure GROX11 just below gate electrode POLY11 and in contact with the gate insulation film HOX1 to form the gate insulation film HOX1 previously. This can ensure normal gate withstand voltage of the MOS transistor and favorable device isolation withstand voltage and increased integration degree simultaneously.


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