The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 25, 2003
Filed:
May. 16, 2002
Jean Y. Yang, Sunnyvale, CA (US);
Arvind Halliyal, Cupertino, CA (US);
Amir H. Jafarpour, Pleasanton, CA (US);
Tazrien Kamal, San Jose, CA (US);
Mark T. Ramsbey, Sunnyvale, CA (US);
Emmanuil Lingunis, San Jose, CA (US);
Hidehiko Shiraiwa, San Jose, CA (US);
Other;
Abstract
A method of manufacturing an integrated circuit includes providing a semiconductor substrate and depositing a charge-trapping dielectric layer and a gate dielectric layer over the semiconductor substrate. Bitlines are implanted closely in the semiconductor substrate and annealed using a rapid thermal anneal. Wordlines and gates are formed and source/drain junctions are implanted in the semiconductor substrate. An interlayer dielectric layer is deposited and the integrated circuit completed.