The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 23, 2003
Filed:
Feb. 14, 2001
Applicant:
Inventors:
Jiong-Ping Lu, Richardson, TX (US);
Ching-Te Lin, Plano, TX (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/14763 ;
U.S. Cl.
CPC ...
H01L 2/14763 ;
Abstract
Two barrier layers are used for a via or contact. A thin CVD barrier ( ) (e.g., SiN, TiSiN, TaSiN, etc.) is deposited over a structure including within a via or contact hole ( ). A sputter etch is then performed to remove the CVD barrier ( ) at the bottom of the via/contact. A second barrier ( ) is deposited after the sputter etch. The second barrier ( ) comprises a lower resistivity barrier such as Ta, Ti, Mo, W, TaN, WN, MoN or TiN since the second barrier remains at the bottom of the via or contact. A metal fill process can then be performed.