The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 09, 2003
Filed:
Apr. 20, 2001
Raymond J. Bulaga, Richmond, VT (US);
Anne E. Gattiker, Austin, TX (US);
John L. Harris, South Burlington, VT (US);
Phillip J. Nigh, Williston, VT (US);
Leo A. Noel, Essex Junction, VT (US);
William J. Thibault, White River Junction, VT (US);
Jody J. Van Horn, Underhill, VT (US);
Donald L. Wheater, Hinesburg, VT (US);
International Business Machines Corporation, Armonk, NY (US);
Abstract
A method and system are provided that minimize wafer or package level test time without adversely impacting yields in downstream manufacturing processes or degrading outgoing quality levels. The method provides optimization by determining, a priority, the most effective set of tests for a given lot or wafer. The invention implements a method using a processor-based system involving the integration of multiple sources of data that include: historical and realtime, product specific and lot specific, from wafer fabrication data (i.e., process measurements, defect inspections, and parametric testing), product qualification test results, physical failure analysis results and manufacturing functional test results. These various forms of data are used to determine an optimal set of tests to run using a test application sequence, on a given product to optimize test time with minimum risk to yield or product quality.