The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 26, 2003
Filed:
Jan. 13, 2000
Richard N. Savage, Scotts Valley, CA (US);
Frank S. Menagh, Santa Cruz, CA (US);
Helder R. Carvalheira, Scotts Valley, CA (US);
Philip A. Troiani, Santa Cruz, CA (US);
Dan L. Cossentine, Santa Cruz, CA (US);
Eric R. Vaughan, Santa Cruz, CA (US);
Bruce E. Mayer, Soquel, CA (US);
ASML US, Inc., Scotts Valley, CA (US);
Abstract
A semiconductor wafer processing system including a multi-chamber module having vertically-stacked semiconductor wafer process chambers and a loadlock chamber dedicated to each semiconductor wafer process chamber. Each process chamber includes a chuck for holding a wafer during wafer processing. The multi-chamber modules may be oriented in a linear array. The system further includes an apparatus having a dual-wafer single-axis transfer arm including a monolithic arm pivotally mounted within said loadlock chamber about a single pivot axis. The apparatus is adapted to carry two wafers, one unprocessed and one processed, simultaneously between the loadlock chamber and the process chamber. A method utilizing the disclosed system is also provided.