The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 19, 2003

Filed:

Sep. 15, 2000
Applicant:
Inventors:

Carmen D. Burns, Austin, TX (US);

James G. Wilder, Austin, TX (US);

Julian Dowden, Austin, TX (US);

Assignee:

Staktek Group L.P., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01R 1/216 ;
U.S. Cl.
CPC ...
H01R 1/216 ;
Abstract

A system and method for selectively stacking and interconnecting individual integrated circuit devices to create a high density integrated circuit module. Connections between stack elements are made through carrier structures that provide inter-element connections that substantially follow an axis that is substantially perpendicular to the vertical axis of the stack. The carrier structure provides connection between elements through conductive paths disposed to provide connection between the foot of an upper IC element and the upper shoulder of the lower IC element. This leaves open to air flow most of the vertical transit section of the lower lead for cooling while creating an air gap between elements that encourages cooling airflow between the elements of the stack. A method for creating stacked integrated circuit modules according to the invention is provided.


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