The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 15, 2003
Filed:
Feb. 13, 2002
Chien-Yu Lin, Taipei, TW;
Li-Wen Liu, Hsinchu, TW;
Ni-Chung Chen, Hsinchu, TW;
Liao-Hon Wen, Banchiau, TW;
Taiwan Semiconductor Manufacturing Company, Hsin-Chu, TW;
Abstract
A method and computer program for dynamic matching of wafer lots waiting for processing and available tools to maximize wafer output. Wafer lot information and tool capability and availability is provides. Priority wafer lots are processed first. All permutations of the remaining non priority lots and available tools are then formed. The longest process time for each permutation is then calculated. A permutation wafers per hour, PWPH, equal to the total number of wafers processed for each permutation divided by the longest process time for that permutation is calculated. If only one permutation has the highest PWPH that permutation is selected for processing. If more than one permutation has the highest PWPH the total wafers per hour, TWPH, equal to the sum of the wafer per hour capability of each tool in the permutation is calculated for those permutations. Any permutation with the highest PWPH and TWPH is selected for processing.