The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 15, 2003

Filed:

Jan. 11, 2002
Applicant:
Inventors:

Henning Braunisch, Chandler, AZ (US);

Raj Nair, Gilbert, AZ (US);

Gilroy Vandentop, Tempe, AZ (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/00 ;
U.S. Cl.
CPC ...
H03K 3/00 ;
Abstract

An electronic package and method for spatially distributing a clock signal is presented. The electronic package includes a low-loss structure, a semiconductor die, clocking vias, and clock receivers on the die. The low-loss structure is constructed and arranged to be driven by a clock signal and to produce standing waves. The clocking vias are constructed and arranged to connect the low-loss structure to the die and to conduct the standing waves to the die. The clock receivers generate respective synchronous on-chip clock signals based at least in part on the conducted standing waves.


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Braunisch, Henning. (2003). Electronic package with integrated clock distribution structure (U.S. Patent No. 6593793). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6593793

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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