The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 13, 2003

Filed:

Dec. 06, 2000
Applicant:
Inventors:

Qi Xiang, San Jose, CA (US);

Ercan Adem, Sunnyvale, CA (US);

Jacques J. Bertrand, Capitola, CA (US);

Paul R. Besser, Austin, TX (US);

Matthew S. Buynoski, Palo Alto, CA (US);

John C. Foster, Mountain View, CA (US);

Paul L. King, Mountain View, CA (US);

George J. Kluth, Sunnyvale, CA (US);

Minh V. Ngo, Fremont, CA (US);

Eric N. Paton, Morgan Hill, CA (US);

Christy Mei-Chu Woo, Cupertino, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/144 ;
U.S. Cl.
CPC ...
H01L 2/144 ;
Abstract

A method of forming a fully silicidized gate of a semiconductor device includes forming silicide in active regions and a portion of a gate. A shield layer is blanket deposited over the device. The top surface of the gate electrode is then exposed. A refractory metal layer is deposited and annealing is performed to cause the metal to react with the gate and fully silicidize the gate, with the shield layer protecting the active regions of the device from further silicidization to thereby prevent spiking and current leakage in the active regions.


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