The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 25, 2003

Filed:

Jan. 16, 2001
Applicant:
Inventors:

Hsing-Seng Wang, Tauyuan, TW;

Rong-Shen Lee, Hsinchu, TW;

Chiang-Han Day, Hsinchu, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
B23K 3/100 ; B23K 3/102 ; B23K 3/512 ;
U.S. Cl.
CPC ...
B23K 3/100 ; B23K 3/102 ; B23K 3/512 ;
Abstract

A one-step bumping/bonding process for forming a semiconductor package is disclosed. In the method, a first electronic substrate which has either a plurality of conductive pads or a plurality of recessed openings formed on top of a plurality of apertures through the substrate is first provided and aligned with a second electronic substrate that has a plurality of conductive pads with each aperture aligned to a conductive pad on the second substrate. A plurality of solder balls is then planted on top of the plurality of conductive pads or the plurality of recessed openings on the surface of the first electronic substrate by a pick-and-place technique. Alternatively, a plurality of solder paste may be printed by a thick film stencil printing process similarly in place of the plurality of solder balls. After a solder reflow process, the solder balls placed on top of the apertures is reflown into the apertures forming solder plugs and making electrical connection with the conductive pads on the second electronic substrate thus completing the one-step bumping/bonding process for forming a semiconductor package. The electronic substrate may be either a printed circuit board or a silicon wafer.


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