Semiconductor memory device having redundant circuitry for replacing defective memory cell

Abstract

A nonvolatile semiconductor memory includes a memory cell array and a redundant cell array, and while a data write operation or a data erase operation is carried out in one of banks in the memory cell array, a data read operation can be carried out in the other banks. The redundant cell array has one or more spare blocks and is provided independently of the banks to relieve a defective memory cell of the memory cell array by substituting the spare block for a defective memory block in any of the blocks. The memory block is active when an access block address to be accessed in the memory cell array in the data write or erase operation or the data read operation does not coincide with the defective block address in the defective address storing circuit, whereas the spare block is active when the access block address coincides with the defective block address in the defective address storing circuit.