The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 11, 2003

Filed:

Feb. 06, 2001
Applicant:
Inventors:

Carl R. Huster, Sunnyvale, CA (US);

Judy An, San Jose, CA (US);

Richard P. Rouse, San Francisco, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/184 ;
U.S. Cl.
CPC ...
H01L 2/184 ;
Abstract

The capacitance between the gate electrode and the source/drain regions of a semiconductor device is reduced by forming source and drain regions that are recessed a prescribed depth below the main surface of the semiconductor substrate. Sidewall spacers and a silicide layer are subsequently formed on the gate electrode stack. The resulting semiconductor device exhibits reduced capacitance between the gate electrode and the source/drain regions, while maintaining circuit reliability.


Find Patent Forward Citations

Huster, Carl. (2003). Method of making recessed source drains to reduce fringing capacitance (U.S. Patent No. 6531347). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6531347

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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