The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 25, 2003

Filed:

Jun. 04, 2001
Applicant:
Inventors:

David Colavito, Rock Hill, NY (US);

Nivo Rovedo, Lagrangeville, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 3/10312 ;
U.S. Cl.
CPC ...
H01L 3/10312 ;
Abstract

A field effect transistor (FET) is disclosed. In an exemplary embodiment of the invention, the FET includes an active semiconductor region defined upon a substrate, the active semiconductor region further having a mesa region formed therein. The FET also includes a gate formed within the active semiconductor region, the gate abutting the mesa region along one side thereof. The FET further includes a source region defined within a first area of the semiconductor region, the first region being located over an insulating layer, and a drain region defined within a second area of the semiconductor region, the second area also being located over the insulating layer. The first and second areas of the semiconductor region are located on opposite sides of the mesa region, and the insulating layer isolates the source region and the drain region from the substrate. In another exemplary embodiment, one of the source region or drain region is defined within a top surface of the mesa region.


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