Semiconductor integrated circuit device and method for manufacturing the same

Abstract

It is an object of the present invention to provide a technology of a semiconductor integrated circuitry that allows each of the DRAM memory cells to be divided finely so as to be more highly integrated and operated faster. In a method for manufacturing such a semiconductor integrated circuitry of the present invention, at first, gate electrodes are formed via a gate insulating film on the main surface of a semiconductor substrate , and on side surfaces of each of the gate electrodes is formed the first side wall spacer composed of silicon nitride and the second side wall spacer composed of silicon oxide. Then, in the selecting MISFET Qs in the DRAM memory cell area are opened connecting holes and in a self-matching manner with respect to the first side wall spacers and are formed connecting portion connecting a conductor to a bit line BL. In addition, in the N channel MISFETs Qn and Qn , and in the P channel MISFET Qp in areas other than the DRAM memory cell area are formed high density N-type semiconductor areas and , as well as a high density P-type semiconductor area in a self-matching manner with respect to the second side wall spacers