The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 19, 2002

Filed:

Sep. 22, 1999
Applicant:
Inventors:

Toshiyuki Nagase, Omiya, JP;

Yoshiyuki Nagatomo, Omiya, JP;

Kazuaki Kubo, Omiya, JP;

Shoichi Shimamura, Omiya, JP;

Koichi Goshi, Omiya, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 2/348 ;
U.S. Cl.
CPC ...
H01L 2/348 ;
Abstract

A power module substrate includes a ceramic substrate having a circuit pattern formed thereon, and a metal frame with which the ceramic substrate can be joined to a water-cooling type heat sink. The metal frame has a thickness equal to that of the ceramic substrate or the ceramic substrate having the circuit pattern, and is provided with plural perforations formed therein. Metal thin sheets having through-holes in communication with the corresponding perforations, and containing contacting portions having the undersides thereof contacted to at least a part of the circumferential surface of the ceramic substrate are disposed on the surface of the metal frame. In a semiconductor device, a semiconductor element is mounted onto the circuit pattern, and the power module substrate is joined directly to the water-cooling type heat sink by inserting male screws through the through-holes and the perforations, and screwing the male screws in the female screws of the water-cooling type heat sink.


Find Patent Forward Citations

Nagase, Toshiyuki. (2002). Power module substrate, method of producing the same, and semiconductor device including the substrate (U.S. Patent No. 6483185). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6483185

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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