The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 19, 2002
Filed:
Nov. 30, 2000
Applicant:
Inventors:
Atsushi Kawasaki, Tokyo, JP;
Kohei Eguchi, Tokyo, JP;
Katsuki Hazama, Tokyo, JP;
Fumitaka Sugaya, Tokyo, JP;
Assignee:
Nippon Steel Corporation, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/18238 ; H01L 2/776 ;
U.S. Cl.
CPC ...
H01L 2/18238 ; H01L 2/776 ;
Abstract
A semiconductor device has, in one embodiment, two wells of different conductivity types formed in a semiconductor substrate. The two wells are arranged to be adjacent to each other to form a junction therebetween. A field oxide film is formed to cover the junction at a main surface of the semiconductor substrate. Other field oxide films or field-shield isolation structures may be formed to isolate circuit elements from one another in the wells.
Kawasaki, Atsushi. (2002). Method of manufacturing a semiconductor device, having first and second semiconductor regions with field shield isolation structures and a field oxide film covering a junction between semiconductor regions (U.S. Patent No. 6482692). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6482692
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile